
using:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004005a0 <_init>:
  4005a0:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4005a4:	910003fd 	mov	x29, sp
  4005a8:	94000038 	bl	400688 <call_weak_fn>
  4005ac:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4005b0:	d65f03c0 	ret

Disassembly of section .plt:

00000000004005c0 <.plt>:
  4005c0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4005c4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf6e8>
  4005c8:	f947fe11 	ldr	x17, [x16, #4088]
  4005cc:	913fe210 	add	x16, x16, #0xff8
  4005d0:	d61f0220 	br	x17
  4005d4:	d503201f 	nop
  4005d8:	d503201f 	nop
  4005dc:	d503201f 	nop

00000000004005e0 <__libc_start_main@plt>:
  4005e0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4005e4:	f9400211 	ldr	x17, [x16]
  4005e8:	91000210 	add	x16, x16, #0x0
  4005ec:	d61f0220 	br	x17

00000000004005f0 <__cxa_atexit@plt>:
  4005f0:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  4005f4:	f9400611 	ldr	x17, [x16, #8]
  4005f8:	91002210 	add	x16, x16, #0x8
  4005fc:	d61f0220 	br	x17

0000000000400600 <_ZNSt8ios_base4InitC1Ev@plt>:
  400600:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400604:	f9400a11 	ldr	x17, [x16, #16]
  400608:	91004210 	add	x16, x16, #0x10
  40060c:	d61f0220 	br	x17

0000000000400610 <abort@plt>:
  400610:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400614:	f9400e11 	ldr	x17, [x16, #24]
  400618:	91006210 	add	x16, x16, #0x18
  40061c:	d61f0220 	br	x17

0000000000400620 <__gmon_start__@plt>:
  400620:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400624:	f9401211 	ldr	x17, [x16, #32]
  400628:	91008210 	add	x16, x16, #0x20
  40062c:	d61f0220 	br	x17

0000000000400630 <_ZNSt8ios_base4InitD1Ev@plt>:
  400630:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400634:	f9401611 	ldr	x17, [x16, #40]
  400638:	9100a210 	add	x16, x16, #0x28
  40063c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400640 <_start>:
  400640:	d280001d 	mov	x29, #0x0                   	// #0
  400644:	d280001e 	mov	x30, #0x0                   	// #0
  400648:	aa0003e5 	mov	x5, x0
  40064c:	f94003e1 	ldr	x1, [sp]
  400650:	910023e2 	add	x2, sp, #0x8
  400654:	910003e6 	mov	x6, sp
  400658:	580000c0 	ldr	x0, 400670 <_start+0x30>
  40065c:	580000e3 	ldr	x3, 400678 <_start+0x38>
  400660:	58000104 	ldr	x4, 400680 <_start+0x40>
  400664:	97ffffdf 	bl	4005e0 <__libc_start_main@plt>
  400668:	97ffffea 	bl	400610 <abort@plt>
  40066c:	00000000 	.inst	0x00000000 ; undefined
  400670:	0040073c 	.word	0x0040073c
  400674:	00000000 	.word	0x00000000
  400678:	004007c0 	.word	0x004007c0
  40067c:	00000000 	.word	0x00000000
  400680:	00400840 	.word	0x00400840
  400684:	00000000 	.word	0x00000000

0000000000400688 <call_weak_fn>:
  400688:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf6e8>
  40068c:	f947f000 	ldr	x0, [x0, #4064]
  400690:	b4000040 	cbz	x0, 400698 <call_weak_fn+0x10>
  400694:	17ffffe3 	b	400620 <__gmon_start__@plt>
  400698:	d65f03c0 	ret
  40069c:	00000000 	.inst	0x00000000 ; undefined

00000000004006a0 <deregister_tm_clones>:
  4006a0:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4006a4:	91010000 	add	x0, x0, #0x40
  4006a8:	b0000081 	adrp	x1, 411000 <__libc_start_main@GLIBC_2.17>
  4006ac:	91010021 	add	x1, x1, #0x40
  4006b0:	eb00003f 	cmp	x1, x0
  4006b4:	540000a0 	b.eq	4006c8 <deregister_tm_clones+0x28>  // b.none
  4006b8:	90000001 	adrp	x1, 400000 <_init-0x5a0>
  4006bc:	f9443021 	ldr	x1, [x1, #2144]
  4006c0:	b4000041 	cbz	x1, 4006c8 <deregister_tm_clones+0x28>
  4006c4:	d61f0020 	br	x1
  4006c8:	d65f03c0 	ret
  4006cc:	d503201f 	nop

00000000004006d0 <register_tm_clones>:
  4006d0:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4006d4:	91010000 	add	x0, x0, #0x40
  4006d8:	b0000081 	adrp	x1, 411000 <__libc_start_main@GLIBC_2.17>
  4006dc:	91010021 	add	x1, x1, #0x40
  4006e0:	cb000021 	sub	x1, x1, x0
  4006e4:	9343fc21 	asr	x1, x1, #3
  4006e8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4006ec:	9341fc21 	asr	x1, x1, #1
  4006f0:	b40000a1 	cbz	x1, 400704 <register_tm_clones+0x34>
  4006f4:	90000002 	adrp	x2, 400000 <_init-0x5a0>
  4006f8:	f9443442 	ldr	x2, [x2, #2152]
  4006fc:	b4000042 	cbz	x2, 400704 <register_tm_clones+0x34>
  400700:	d61f0040 	br	x2
  400704:	d65f03c0 	ret

0000000000400708 <__do_global_dtors_aux>:
  400708:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40070c:	910003fd 	mov	x29, sp
  400710:	f9000bf3 	str	x19, [sp, #16]
  400714:	b0000093 	adrp	x19, 411000 <__libc_start_main@GLIBC_2.17>
  400718:	39410260 	ldrb	w0, [x19, #64]
  40071c:	35000080 	cbnz	w0, 40072c <__do_global_dtors_aux+0x24>
  400720:	97ffffe0 	bl	4006a0 <deregister_tm_clones>
  400724:	52800020 	mov	w0, #0x1                   	// #1
  400728:	39010260 	strb	w0, [x19, #64]
  40072c:	f9400bf3 	ldr	x19, [sp, #16]
  400730:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400734:	d65f03c0 	ret

0000000000400738 <frame_dummy>:
  400738:	17ffffe6 	b	4006d0 <register_tm_clones>

000000000040073c <main>:
  40073c:	52800000 	mov	w0, #0x0                   	// #0
  400740:	d65f03c0 	ret

0000000000400744 <_Z41__static_initialization_and_destruction_0ii>:
  400744:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400748:	910003fd 	mov	x29, sp
  40074c:	b9001fa0 	str	w0, [x29, #28]
  400750:	b9001ba1 	str	w1, [x29, #24]
  400754:	b9401fa0 	ldr	w0, [x29, #28]
  400758:	7100041f 	cmp	w0, #0x1
  40075c:	540001e1 	b.ne	400798 <_Z41__static_initialization_and_destruction_0ii+0x54>  // b.any
  400760:	b9401ba1 	ldr	w1, [x29, #24]
  400764:	529fffe0 	mov	w0, #0xffff                	// #65535
  400768:	6b00003f 	cmp	w1, w0
  40076c:	54000161 	b.ne	400798 <_Z41__static_initialization_and_destruction_0ii+0x54>  // b.any
  400770:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400774:	91012000 	add	x0, x0, #0x48
  400778:	97ffffa2 	bl	400600 <_ZNSt8ios_base4InitC1Ev@plt>
  40077c:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400780:	9100e002 	add	x2, x0, #0x38
  400784:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400788:	91012001 	add	x1, x0, #0x48
  40078c:	90000000 	adrp	x0, 400000 <_init-0x5a0>
  400790:	9118c000 	add	x0, x0, #0x630
  400794:	97ffff97 	bl	4005f0 <__cxa_atexit@plt>
  400798:	d503201f 	nop
  40079c:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4007a0:	d65f03c0 	ret

00000000004007a4 <_GLOBAL__sub_I_main>:
  4007a4:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4007a8:	910003fd 	mov	x29, sp
  4007ac:	529fffe1 	mov	w1, #0xffff                	// #65535
  4007b0:	52800020 	mov	w0, #0x1                   	// #1
  4007b4:	97ffffe4 	bl	400744 <_Z41__static_initialization_and_destruction_0ii>
  4007b8:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4007bc:	d65f03c0 	ret

00000000004007c0 <__libc_csu_init>:
  4007c0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4007c4:	910003fd 	mov	x29, sp
  4007c8:	a901d7f4 	stp	x20, x21, [sp, #24]
  4007cc:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf6e8>
  4007d0:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf6e8>
  4007d4:	9136c294 	add	x20, x20, #0xdb0
  4007d8:	913682b5 	add	x21, x21, #0xda0
  4007dc:	a902dff6 	stp	x22, x23, [sp, #40]
  4007e0:	cb150294 	sub	x20, x20, x21
  4007e4:	f9001ff8 	str	x24, [sp, #56]
  4007e8:	2a0003f6 	mov	w22, w0
  4007ec:	aa0103f7 	mov	x23, x1
  4007f0:	9343fe94 	asr	x20, x20, #3
  4007f4:	aa0203f8 	mov	x24, x2
  4007f8:	97ffff6a 	bl	4005a0 <_init>
  4007fc:	b4000194 	cbz	x20, 40082c <__libc_csu_init+0x6c>
  400800:	f9000bb3 	str	x19, [x29, #16]
  400804:	d2800013 	mov	x19, #0x0                   	// #0
  400808:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  40080c:	aa1803e2 	mov	x2, x24
  400810:	aa1703e1 	mov	x1, x23
  400814:	2a1603e0 	mov	w0, w22
  400818:	91000673 	add	x19, x19, #0x1
  40081c:	d63f0060 	blr	x3
  400820:	eb13029f 	cmp	x20, x19
  400824:	54ffff21 	b.ne	400808 <__libc_csu_init+0x48>  // b.any
  400828:	f9400bb3 	ldr	x19, [x29, #16]
  40082c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400830:	a942dff6 	ldp	x22, x23, [sp, #40]
  400834:	f9401ff8 	ldr	x24, [sp, #56]
  400838:	a8c47bfd 	ldp	x29, x30, [sp], #64
  40083c:	d65f03c0 	ret

0000000000400840 <__libc_csu_fini>:
  400840:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400844 <_fini>:
  400844:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400848:	910003fd 	mov	x29, sp
  40084c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400850:	d65f03c0 	ret
